[1] Ma LiWang ZhigongXu Jian,. A signal-summing programmable gain amplifier employingbinary-weighted switching and constant-gm bias [J]. Journal of Southeast University (English Edition), 2017, 33 (2): 134-139. [doi:10.3969/j.issn.1003-7985.2017.02.002]

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A signal-summing programmable gain amplifier employingbinary-weighted switching and constant-g_m bias()

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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:

33

Issue:

2017 2

Page:

134-139

Research Field:

Circuit and System

Publishing date:

2017-06-30

Info

Title:

A signal-summing programmable gain amplifier employingbinary-weighted switching and constant-g_m bias

Author(s):

Ma LiWang ZhigongXu Jian

Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China

Keywords:

programmable gain amplifier;  variable gain amplifier;  signal-summing topology;  constant-g_m

PACS:

TN43

DOI:

10.3969/j.issn.1003-7985.2017.02.002

Abstract:

A novel programmable gain amplifier(PGA)based on a signal-summing topology is proposed. Different from conventional signal-summing variable gain amplifiers(VGA), a binary-weighted switching technique is employed to vary the current-steering transistors’ aspect ratio to change their transconductance, and hence, an accurate gain step size of 6 dB is achieved. The constant-g_m biasing technique and the matching of the transistors and resistors ensures that the gain of the proposed topology is independent of the variation of process, voltage and temperature(PVT). P-well NMOS(N-metal oxide semiconductor)transistors are utilized to eliminate the influence of back-gate effect which will induce gain error. The source-degeneration technique ensures good linearity performance at a low gain. The proposed PGA is fabricated in a 0.18 μm CMOS(complementary metal oxide semiconductor)process. The measurement results show a variable gain ranging from 0 to 24 dB with a step size of 6 dB and a maximum gain error of 0.3 dB. A constant 3 dB bandwidth of 210 MHz is achieved at different gain settings. The measured output 3rd intercept point(OIP3)and minimum noise figure(NF)are 20.9 dBm and 11.1 dB, respectively. The whole PGA has a compact layout of 0.068 mm². The total power consumption is 4.8 mW under a 1.8 V supply voltage.

References:

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Memo

Memo:

Biographies: Ma Li(1989—), male, doctor; Wang Zhigong(corresponding author), male, doctor, professor, zgwang@seu.edu.cn.
Foundation item: The National Natural Science Foundation of China(No.61306069).
Citation: Ma Li, Wang Zhigong, Xu Jian. A signal-summing programmable gain amplifier employing binary-weighted switching and constant-g_m bias[J].Journal of Southeast University(English Edition), 2017, 33(2):134-139.DOI:10.3969/j.issn.1003-7985.2017.02.002.

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