|Table of Contents|

[1] Yin Qin, Qi Tao, Wu Guanglin, Wu Jianhui, et al. Capacitor self-calibration technique usedin time-interleaved successive approximation ADC [J]. Journal of Southeast University (English Edition), 2006, 22 (2): 164-168. [doi:10.3969/j.issn.1003-7985.2006.02.005]

Capacitor self-calibration technique usedin time-interleaved successive approximation ADC()

Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

2006 2
Research Field:
Circuit and System
Publishing date:


Capacitor self-calibration technique usedin time-interleaved successive approximation ADC
Yin Qin Qi Tao Wu Guanglin Wu Jianhui
National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
capacitor self-calibration analog-to-digital converter successive approximation time-interleaved
A capacitor self-calibration circuit used in a successive approximation analog-to-digital converter(SA-ADC)is presented.This capacitor self-calibration circuit can calibrate erroneous data and work with the ADC by adding an additional clock period. This circuit is used in a 10 bit 32 Msample/s time-interleaved SA-ADC.The chip is implemented with Chart 0.25 μm 2.5 V process and totally occupies an area of 1.4 mm×1.3 mm.After calibration, the simulated signal-to-noise ratio(SNR)is 59.586 1dB and the spurious-free dynamic range(SFDR)is 70.246 dB at 32 MHz.The measured signal-to-noise and distortion ratio(SINAD)is 44.82 dB and the SFDR is 63.760 4 dB when the ADC samples a 5.8 MHz sinusoid wave.


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Biographies: Yin Qin(1981—), male, graduate;Wu Jianhui(corresponding author), male, doctor, professor, wjh@seu.edu.cn.
Last Update: 2006-06-20