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[1] Xu Yong, Wang Zhigong, Li Zhiqun, et al. Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end [J]. Journal of Southeast University (English Edition), 2005, 21 (3): 260-262. [doi:10.3969/j.issn.1003-7985.2005.03.003]
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Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end()
蓝牙射频前端跳频频综的几项关键技术
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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:
21
Issue:
2005 3
Page:
260-262
Research Field:
Circuit and System
Publishing date:
2005-09-30

Info

Title:
Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end
蓝牙射频前端跳频频综的几项关键技术
Author(s):
Xu Yong1;  2;  Wang Zhigong1;  Li Zhiqun1;  Zhang Li1;  Min Rui2;  Xu Guanghui1;  3
1Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China
2Institute of Sciences, PLA University of Science and Technology, Nanjing 211101, China
3Institute of Communication Engineering, PLA University of Science and Technology, Nanjing 210007, China
徐勇1;  2;  王志功1;  李智群1;  章丽1;  闵锐2;  徐光辉1;  3
1东南大学射频与光电集成电路研究所, 南京 210096; 2解放军理工大学理学院, 南京 211101; 3解放军理工大学通信工程学院, 南京 210007
Keywords:
Bluetooth;  frequency hopping;  frequency synthesizer;  voltage controlled oscillator(VCO);  dual-modulus prescaler;  programmable divider
蓝牙;  跳频;  频率综合;  压控振荡器;  双模预分频器;  可编程分频器
PACS:
TN431
DOI:
10.3969/j.issn.1003-7985.2005.03.003
Abstract:
A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency(RF)front-end is presented, and design of a voltage controlled oscillator(VCO)and dual-modulus prescaler are focused on.It is fabricated in a 0.18 μm mixed-signal CMOS(complementary metal-oxide-semiconductor transistor)process.The power dissipation of VCO is low and a stable performance is gained.The measured phase noise of VCO at 2.4 GHz is less than -114.32 dBc/Hz.The structure of the DMP is optimized and a novel D-latch integrated with “OR” logic gate is used.The measured results show that the chip can work well under a 1.8 V power supply.The power dissipation of the core part in a dual modulus prescaler is only 5.76 mW.An RMS jitter of 2 ps is measured on the output signal at 118.3 MHz.It is less than 0.02% of the clock period.
提出了应用于蓝牙射频前端的跳频频率综合器的设计方案, 并介绍了关键模块压控振荡器与双模预分频器的设计技术, 采用混合0.18 μm CMOS工艺进行了流片验证.设计的压控振荡器性能稳定, 低功耗低相噪, 频率在2.4 GHz时测试相位噪声达-114.32 dBc/Hz@2.4 MHz.对双模分频器进行了设计优化, 并采用一种集成“或”逻辑的锁存器结构, 降低了功耗, 提高了电路速度.测试结果显示电路在1.8 V时稳定工作双模分频器核心功耗仅5.76 mW;均方差抖动在输出周期为118.3 MHz时仅为2 ps, 约占输出周期的0.02%.

References:

[1] Georgescu Bogdan A, Nakaska Joshua K, Randall Robert G, et al.A 0.18 μm CMOS Bluetooth frequency synthesizer for integration with a Bluetooth SOC reference platform [A].In:Proceedings of the 3rd IEEE International Workshop on SOC for Real-Time Applications [C].Calgary, Alberta, Canada, 2003.258-263.
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[8] Yang Ching-Yuan, Dehng Guang-Kaai, Hsv June-Ming, et al.New dynamic dlip-dlips for high-speed dual-modulus prescaler [J].IEEE Journal of Solid-State Circuits, 1998, 33(10):1568-1571.
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Memo

Memo:
Biographies: Xu Yong(1974—), male, graduate;Wang Zhigong(corresponding author), male, doctor, professor, zgwang@seu.edu.cn.
Last Update: 2005-09-20