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[1] Xu Yong, Wang Zhigong, Li Zhiqun, et al. Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end [J]. Journal of Southeast University (English Edition), 2005, 21 (3): 260-262. [doi:10.3969/j.issn.1003-7985.2005.03.003]
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Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end()
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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:
21
Issue:
2005 3
Page:
260-262
Research Field:
Circuit and System
Publishing date:
2005-09-30

Info

Title:
Key technologies of frequency-hopping frequency synthesizerfor Bluetooth RF front-end
Author(s):
Xu Yong1 2 Wang Zhigong1 Li Zhiqun1 Zhang Li1 Min Rui2 Xu Guanghui1 3
1Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China
2Institute of Sciences, PLA University of Science and Technology, Nanjing 211101, China
3Institute of Communication Engineering, PLA University of Science and Technology, Nanjing 210007, China
Keywords:
Bluetooth frequency hopping frequency synthesizer voltage controlled oscillator(VCO) dual-modulus prescaler programmable divider
PACS:
TN431
DOI:
10.3969/j.issn.1003-7985.2005.03.003
Abstract:
A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency(RF)front-end is presented, and design of a voltage controlled oscillator(VCO)and dual-modulus prescaler are focused on.It is fabricated in a 0.18 μm mixed-signal CMOS(complementary metal-oxide-semiconductor transistor)process.The power dissipation of VCO is low and a stable performance is gained.The measured phase noise of VCO at 2.4 GHz is less than -114.32 dBc/Hz.The structure of the DMP is optimized and a novel D-latch integrated with “OR” logic gate is used.The measured results show that the chip can work well under a 1.8 V power supply.The power dissipation of the core part in a dual modulus prescaler is only 5.76 mW.An RMS jitter of 2 ps is measured on the output signal at 118.3 MHz.It is less than 0.02% of the clock period.

References:

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[6] Huang Chih-Ming, Floyd B A, Park N, et al.Fully integrated 5.35 GHz CMOS VCOs and prescalers [J].IEEE Transactions on Microwave Theory and Techniques, 2001, 49(1):17-22.
[7] Ajjikuttira A B, Wei Liat Chan, Yong Lian.A 5.5 GHz prescaler in 0.18 μm CMOS technology [A].In:Proceedings of the IEEE Asia-Pacific Conference on ASIC [C].Singapore, 2002.69-72.
[8] Yang Ching-Yuan, Dehng Guang-Kaai, Hsv June-Ming, et al.New dynamic dlip-dlips for high-speed dual-modulus prescaler [J].IEEE Journal of Solid-State Circuits, 1998, 33(10):1568-1571.
[9] Chi Baoyong, Shi Bingxue.A novel CMOS dual modulus prescaler based on new optimized structure and dynamic circuit technique [J].Chinese Journal of Semiconductors, 2002, 23(4):357-359.

Memo

Memo:
Biographies: Xu Yong(1974—), male, graduate;Wang Zhigong(corresponding author), male, doctor, professor, zgwang@seu.edu.cn.
Last Update: 2005-09-20