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[1] Guo Xuefeng, Wang Zhigong, Li Zhiqun, Tang Lu, et al. Wideband CMOS LC VCO design and phase noise analysis [J]. Journal of Southeast University (English Edition), 2008, 24 (4): 433-436. [doi:10.3969/j.issn.1003-7985.2008.04.008]
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Wideband CMOS LC VCO design and phase noise analysis()
宽带CMOS LC压控振荡器设计及相位噪声分析
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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:
24
Issue:
2008 4
Page:
433-436
Research Field:
Electronic Science and Engineering
Publishing date:
2008-12-30

Info

Title:
Wideband CMOS LC VCO design and phase noise analysis
宽带CMOS LC压控振荡器设计及相位噪声分析
Author(s):
Guo Xuefeng, Wang Zhigong, Li Zhiqun, Tang Lu
Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China
郭雪锋, 王志功, 李智群, 唐路
东南大学射频与光电集成电路研究所, 南京 210096
Keywords:
voltage controlled oscillator(VCO) wideband phase noise
压控振荡器 宽频带 相位噪声
PACS:
TN75
DOI:
10.3969/j.issn.1003-7985.2008.04.008
Abstract:
A wideband LC cross-coupled voltage controlled oscillator(VCO)is designed and realized with standard 0.18 μm complementary metal-oxide-semiconductor(CMOS)technology.Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure.The functional relationships between the phase noise and the transistors’ width-length ratios are deduced by a linear time variant(LTV)model.The theoretical optimized parameter value ranges are determined.To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions.Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats.Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches -83 dBc/Hz at a 10 kHz offset from the carrier.The chip size is 1.2 mm×0.9 mm.
应用标准0.18 μm CMOS工艺设计并实现了宽带交叉耦合LC压控振荡器.采用开关电容阵列拓宽频率范围.设计过程中对相位噪声进行了优化.应用线性时变模型(LTV)推导出相位噪声与MOS晶体管宽长比之间的函数关系, 从理论上给出相位噪声性能最优的元件参数取值范围.为简化推导过程, 针对电路特点按晶体管工作状态来细分电路工作区域, 从而避免了大量积分运算, 以尽可能简单的比例形式得到相位噪声与设计变量间的函数关系.测试结果表明, 在1.8 V电源电压下, 核心电路工作电流为8.8 mA, 压控振荡器的频率范围为1.17~1.90 GHz, 10 kHz频偏处相位噪声达到 -83 dBc/Hz.芯片面积为1.2 mm×0.9 mm.

References:

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Memo

Memo:
Biographies: Guo Xuefeng(1978—), male, graduate;Wang Zhigong(corresponding author), male, doctor, professor, zgwang@seu.edu.cn.
Citation: Guo Xuefeng, Wang Zhigong, Li Zhiqun, et al.Wideband CMOS LC VCO design and phase noise analysis[J].Journal of Southeast University(English Edition), 2008, 24(4):433-436.
Last Update: 2008-12-20