[1] Dai Zhisheng, Zhang Meng, Gao Xing, Tang Jiajian, et al. New scale factor correction scheme for CORDIC algorithm [J]. Journal of Southeast University (English Edition), 2009, 25 (3): 313-315. [doi:10.3969/j.issn.1003-7985.2009.03.006]
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New scale factor correction scheme for CORDIC algorithm(
)
用于CORDIC算法的一种新的模校正方法
)Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]
- Volumn:
- 25
- Issue:
- 2009 3
- Page:
- 313-315
- Research Field:
- Computer Science and Engineering
- Publishing date:
- 2009-09-30
Info
- Title:
- New scale factor correction scheme for CORDIC algorithm
- 用于CORDIC算法的一种新的模校正方法
- Author(s):
- Dai Zhisheng; Zhang Meng; Gao Xing; Tang Jiajian
- National ASIC System Engineering Research Center, Southeast University, Nanjing 210096, China
- Keywords:
- coordinate rotation digital computer(CORDIC)algorithm; scale factor correction; field-programmable gate array(FPGA)
- PACS:
- TP391
- DOI:
- 10.3969/j.issn.1003-7985.2009.03.006
- Abstract:
- To overcome the drawbacks such as irregular circuit construction and low system throughput that exist in conventional methods, a new factor correction scheme for coordinate rotation digital computer(CORDIC)algorithm is proposed. Based on the relationship between the iteration formulae, a new iteration formula is introduced, which leads the correction operation to be several simple shifting and adding operations. As one key part, the effects caused by rounding error are analyzed mathematically and it is concluded that the effects can be degraded by an appropriate selection of coefficients in the iteration formula. The model is then set up in Matlab and coded in Verilog HDL language. The proposed algorithm is also synthesized and verified in field-programmable gate array(FPGA). The results show that this new scheme requires only one additional clock cycle and there is no change in the elementary iteration for the same precision compared with the conventional algorithm. In addition, the circuit realization is regular and the change in system throughput is very minimal.
- 提出一种新的纠正CORDIC算法中模因子的方法以解决传统方法所带来的电路结构不规则、系统吞吐率降低等弊端. 首先根据迭代方程之间的关系, 通过推导引入一个新的迭代方程, 将模因子的校正过程转化为只需要移位和加法运算即可实现的简单的迭代过程. 然后分析了该算法量化误差中的舍入误差所带来的影响, 并提出该误差可以通过对迭代方程中的系数进行合适取值来降低. 最后对提出的算法通过Matlab建模并利用Verilog HDL语言进行RTL级编程, 经过综合后在FPGA上进行了验证. 仿真结果表明, 与传统方法相比, 在相同精度条件下使用所提方法只需要额外的一个时钟周期即可达到模校正的目的, 且不需要修改基本的迭代操作. 因此电路实现比较规则, 同时系统吞吐率变化较小.
References:
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Memo
- Memo:
-
Biographies: Dai Zhisheng(1985—), male, graduate; Zhang Meng(corresponding author), male, professor, zmeng@seu.edu.cn.
Foundation item: The National High Technology Research and Development Program of China(863 Program)(No.2007AA01Z280).
Citation: Dai Zhisheng, Zhang Meng, Gao Xing, et al. New scale factor correction scheme for CORDIC algorithm[J]. Journal of Southeast University(English Edition), 2009, 25(3): 313-315.