[1] Sun Weifeng, Wu Jianhui, Yi Yangbo, et al. High-voltage power integrated circuit technology using bulk-silicon for plasma display panels data driver IC[J]. Microelectron Eng, 2004, 71(1): 112-118.
[2] Whiston S, Bain D, Deignan A, et al. Complementary LDMOS transistors for a CMOS/BiCMOS process[C]//Proc IEEE Int Symp Power Semicond Devices ICs. Berlin, Germany, 2000: 51-54.
[3] Terashima T, Yamamoto F, Hatasako K. Multi-voltage device integration technique for 0.5 μm BiCMOS & DMOS process[C]//Proc IEEE Int Symp Power Semicond Devices ICs. Berlin, Germany, 2000: 331-334.
[4] Chen J F, Tian K S, Chen S Y, et al. On-resistance degradation induced by hot-carrier injection in LDMOS transistors with STI in the drift region[J]. IEEE Electron Device Letters, 2008, 29(9): 1071-1073.
[5] Vandooren A, Cristoloveanu S, Conley J F Jr, et al. A systematic investigation of the degradation mechanisms in SOI n-channel LD-MOSFETS[J]. Solid-State Electronics, 2003, 47(9): 1419-1427.
[6] Chen J F, Tian K S, Chen S Y, et al. Gate current dependent hot-carrier-induced degradation in LDMOS transistors[J]. IEEE Electron Device Letters, 2008, 44(16): 991-992.
[7] Su R-Y, Chiang P Y, Gong Jeng, et al. Investigation on the initial hot-carrier injection in P-LDMOS transistors with shallow trench isolation structure[J]. IEEE Transactions on Electron Devices, 2008, 55(12): 3569-3573.
[8] Cortes I, Fernández-Martínez P, Flores D, et al. Static and dynamic electrical performances of STI thin-SOI power LDMOS transistors[J]. Semiconductor Science and Technology, 2008, 23(9): 493-498.
[9] Yang Xiaodong, Tian Lilin, Chen Wensong. Novel measurement method for lateral distribution of interface state based on charge pumping technology[J]. Chinese Journal of Semiconductors, 1998, 19(11): 834-840.(in Chinese)