[1] Pu Yuqian, Shen Hongchang, Tang Feihong, et al. Design of millimeter-wave reflective attenuatorswith capacitive compensation technique [J]. Journal of Southeast University (English Edition), 2023, 39 (2): 153-160. [doi:10.3969/j.issn.1003-7985.2023.02.006]

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Design of millimeter-wave reflective attenuatorswith capacitive compensation technique()

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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:

39

Issue:

2023 2

Page:

153-160

Research Field:

Circuit and System

Publishing date:

2023-06-20

Info

Title:

Design of millimeter-wave reflective attenuatorswith capacitive compensation technique

Author(s):

Pu Yuqian¹;  2 ;  Shen Hongchang¹;  2;  Tang Feihong²;  Hao Zhangwei²;  Zhang Youming¹;  Huang Fengyi¹

¹School of Cyber Science and Engineering, Southeast University, Nanjing 210096, China
²Nanjing Guobo Electronics Co., Ltd., Nanjing 211153, China

Keywords:

reflective attenuators;  millimeter-wave;  capacitive compensation;  low attenuation error;  low phase variation

PACS:

TN454

DOI:

10.3969/j.issn.1003-7985.2023.02.006

Abstract:

To improve the attenuation accuracy and phase variation performance, two 5-bit millimeter-wave reflective attenuators with a capacitive compensation technique in gallium arsenide(GaAs)pseudomorphic high-electron-mobility transistor(PHEMT)process are presented. The parasitic effect of a millimeter-wave switch can be absorbed effectively in the design of the reflection load with capacitive compensation. Thus, attenuation and phase accuracy can be improved. Three basic capacitive compensation topologies were presented, and based on the analysis of the reflection coefficient on the Smith chart, the corresponding attenuation and phase variation were given. Furthermore, the design flow and optimization method of the reflective attenuator based on the capacitive compensation technique were summarized. Both chips are integrated with a 5-bit attenuator and a single-pole double-throw(SPDT)switch, and the chip size is 3 mm × 1 mm. Chip A with tail capacitance compensation was fabricated by a 0.5 μm GaAs PHEMT process, and Chip B with the compensation of the shunt capacitors before and after the switch was fabricated by a 0.15 μm GaAs PHEMT process. For both chips, the insertion loss(IL)with the SPDT switch is less than 4.5 dB, the IL of the 5-bit attenuator is less than 3 dB, the root-mean-square attenuation error is less than 0.4 dB, and the input 1 dB gain compression power is greater than 25 dBm. The phase variations of Chips A and B are less than ±5°and ±2.5°, respectively.

References:

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Memo

Memo:

Biographies: Pu Yuqian(1989—), male, Ph.D. candidate; Zhang Youming(corresponding author), male, doctor, associate professor, zhangyouming@seu.edu.cn.
Citation: Pu Yuqian, Shen Hongchang, Tang Feihong, et al. Design of millimeter-wave reflective attenuators with capacitive compensation technique[J].Journal of Southeast University(English Edition), 2023, 39(2):153-160.DOI:10.3969/j.issn.1003-7985.2023.02.006.

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