[1] Ma Wei, Jiang Jinguang, Liu Jingnan, et al. High performance differential CMOS LNA designfor low-IF GPS receiver [J]. Journal of Southeast University (English Edition), 2009, 25 (1): 26-30. [doi:10.3969/j.issn.1003-7985.2009.01.007]
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High performance differential CMOS LNA designfor low-IF GPS receiver(
)
用于低中频GPS接收机的高性能CMOS差分低噪声放大器设计
)Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]
- Volumn:
- 25
- Issue:
- 2009 1
- Page:
- 26-30
- Research Field:
- Electronic Science and Engineering
- Publishing date:
- 2009-03-30
Info
- Title:
- High performance differential CMOS LNA designfor low-IF GPS receiver
- 用于低中频GPS接收机的高性能CMOS差分低噪声放大器设计
- Author(s):
- Ma Wei1; 2; Jiang Jinguang2; Liu Jingnan2
-
1School of Electronic Information, Wuhan University, Wuhan 430079, China
2GNSS Research Center, Wuhan University, Wuhan 430079, China
- PACS:
- TN722
- DOI:
- 10.3969/j.issn.1003-7985.2009.01.007
- Abstract:
- A 1.575 GHz CMOS(complementary metal-oxide-semiconductor transistor)low noise amplifier(LNA)suitable for a low intermediate frequency(IF)global positioning system(GPS)receiver is presented. Considering parasitic effects resulting from bond pad and input electrostatic discharge(ESD)protection diodes, the optimization of the input matching and noise performance is analyzed, and a narrowband inductor model is applied to the circuit design and optimization.Based on the Volterra series, the nonlinearity of the LNA is analyzed and an equation describing input-referred third-order intercept points(IIP3)which indicate the nonlinearity effects is derived;accordingly, the trade-off between the power consumption and linearity is made.The LNA is designed and simulated with TSMC(Taiwan Semiconductor Manufacturing Company)0.18 μm radio frequency(RF)technology.Simulation results show that the LNA has a noise figure of only 1.1 dB, -8.3 dBm IIP3 with 3 mA current consumption from a 1.8 V voltage supply, and the input impedances match well.
- 设计了一个可用于低中频GPS接收机系统的1.575 GHz的低噪声放大器.首先考虑了ESD保护二极管和焊盘的寄生效应, 对输入匹配和噪声性能的优化做了分析, 并将窄带电感模型用于电路设计优化.其次基于Volterra级数, 对放大器的非线性做了分析, 推导了电路各参数与IIP3的关系表达式, 据此在功耗和线性度之间做了折衷考虑.采用TSMC 0.18 μm 射频工艺对低噪声放大器进行设计和仿真.仿真结果表明:在1.8 V工作电压下, 噪声系数仅为1.1 dB, IIP3为-8.3 dBm, 电流消耗3 mA, 电路的输入匹配良好.
References:
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Memo
- Memo:
-
Biographies: Ma Wei(1972—), male, graduate;Jiang Jinguang(corresponding author), male, professor, jgjiang95@yahoo.com.cn.
Foundation item: The National High Technology Research and Development Program of China(863 Program)(No.2007AA12Z332).
Citation: Ma Wei, Jiang Jinguang, Liu Jingnan.High performance differential CMOS LNA design for low-IF GPS receiver[J].Journal of Southeast University(English Edition), 2009, 25(1):26-30.