[1] Fan Chen, Wang Rong, Wang Zhigong,. Design of a 12-Gbit/s CMOS DNFFCGdifferential transimpedance amplifier [J]. Journal of Southeast University (English Edition), 2018, 34 (1): 1-5. [doi:10.3969/j.issn.1003-7985.2018.01.001]

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Design of a 12-Gbit/s CMOS DNFFCGdifferential transimpedance amplifier()

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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:

34

Issue:

2018 1

Page:

1-5

Research Field:

Information and Communication Engineering

Publishing date:

2018-03-20

Info

Title:

Design of a 12-Gbit/s CMOS DNFFCGdifferential transimpedance amplifier

Author(s):

Fan Chen;  Wang Rong;  Wang Zhigong

Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China

Keywords:

very-short-reach;  optoelectronic integrated circuit;  negative feedback;  feed-forward common gate;  trans-impedance gain

PACS:

TN915

DOI:

10.3969/j.issn.1003-7985.2018.01.001

Abstract:

A 12-Gbit/s low-power, wide-bandwidth CMOS(complementary metal oxide semiconductor)dual negative feedback feed-forward common gate(DNFFCG)differential trans-impedance amplifier(TIA)is presented for the very-short-reach(VSR)optoelectronic integrated circuit(OEIC)receiver. The dominant pole of the input node is shifted up to a high frequency, and thus the bandwidth of the CMOS DNFFCG TIA is improved. Besides, two negative feedback loops are used to reduce the input impedance and further increase the bandwidth. The proposed TIA was fabricated using TSMC 0.18 μm CMOS technology. The whole circuit has a compact chip area, the core area of which is only 0.003 6 mm². The power consumption is 14.6 mW excluding 2-stage differential buffers. The test results indicate that the 3 dB bandwidth of 9 GHz is achieved with a 1.8 V supply voltage and its trans-impedance gain is 49.2 dBΩ. The measured average equivalent input noise current density is 28.1 pA/Hz^1/2. Under the same process conditions, the DNFFCG has better gain bandwidth product compared with those in the published papers.

References:

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Memo

Memo:

Biographies: Fan Chen(1988—), male, Ph.D. candidate; Wang Rong(corresponding author), female, doctor, associate professor, wangrong@seu.edu.cn.
Foundation item: The National Natural Science Foundation of China(No.61306069).
Citation: Fan Chen, Wang Rong, Wang Zhigong. Design of a 12-Gbit/s CMOS DNFFCG differential transimpedance amplifier[J].Journal of Southeast University(English Edition), 2018, 34(1):1-5.DOI:10.3969/j.issn.1003-7985.2018.01.001.

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