[1] Chang Changyuan, Li Xian, Yao Jiannan, Li Juan, et al. Rail-to-rail op-amp with constant transconductance, SR and gain [J]. Journal of Southeast University (English Edition), 2008, 24 (2): 163-167. [doi:10.3969/j.issn.1003-7985.2008.02.008]

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Rail-to-rail op-amp with constant transconductance, SR and gain()

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Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

Volumn:

24

Issue:

2008 2

Page:

163-167

Research Field:

Circuit and System

Publishing date:

2008-06-03

Info

Title:

Rail-to-rail op-amp with constant transconductance, SR and gain

Author(s):

Chang Changyuan¹;  Li Xian²;  Yao Jiannan¹;  Li Juan²

¹College of Integrated Circuits, Southeast University, Nanjing 210096, China
²School of Electronic Science and Engineering, Southeast University, Nanjing 210096, China

Keywords:

CMOS analog circuit;  op-amp;  rail-to-rail;  constant transconductance;  constant slew rate;  constant gain

PACS:

TN492

DOI:

10.3969/j.issn.1003-7985.2008.02.008

Abstract:

A novel general-purpose low-voltage rail-to-rail CMOS(complementary metal-oxide-semiconductor transistor)operational amplifier(op-amp)is introduced, which obtains constant transconductance, slew rate and constant high gain over the entire input common mode voltage range.The proposed scheme has the potential for applications in deep submicrometer technology, as the operation of the circuit does not exclusively rely on the square-law or the linear-law of transistors.The scheme is compact and suitable for applications as VLSI cell.The rail-to-rail op-amp has been implemented in DPDM 0.6 μm mixed-signal process.The simulations show that in the entire range of input common mode voltage, the variations in transconductance, SR and gain are 1%, 2.3%, 1.36 dB, respectively.Based on this, the layout and tape-out are carried out.The area of layout is 0.072 mm².The test results are basically consistent with the circuit simulation.

References:

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[2] Carrillo Juan M, Duque-Carrillo J Francisco, Toreli Guido, et al.Constant-g_m constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries [J].IEEE Journal of Solid-State Circuits, 2003, 38(8):1364-1372.
[3] Fiez Terri S, Yang Howard C, Yang John J, et al.A family of high-swing CMOS operational amplifiers [J].IEEE Journal of Solid-State Circuits, 1989, 24(6):1683-1687.
[4] Hogervorst Ron, Tero John P, Eschauzier Ruud G H, et al.A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries [C]//Proceedings of the 1994 IEEE International Solid-State Circuits Conference.San Francisco, CA, USA, 1994:244-245.
[5] Wang M, Mayhugn T L Jr, Embabi Sh H K, et al.Constant-g_m rail-to-rail CMOS op-amp input stage with overlapped transition regions [J].IEEE Journal of Solid-State Circuits, 1999, 34(2):148-156.
[6] Sakurai S, Ismai M.Robust design of rail-to-rail CMOS operational amplifier for a low power supply voltage [J].IEEE Journal of Solid-State Circuits, 1996, 31(2):146-156.
[7] Yan Shouli, Hu Jingyu, Song Tongyu, et al.A constant-g_m rail-to-rail op-amp input stage using dynamic current scaling technique [C]//IEEE Proceedings of the ISCAS. 2005, 3:2563-2566.
[8] Song Tongyu, Hu Jingyu, Li Xiaohong, et al.A constant-g_m constant-slew-rate rail-to-rail input stage with static feedback and dynamic current steering for VLSI cell libraries [J].IEEE Transactions on Circuits and Systems Ⅱ:Express Briefs, 2007, 54(1):76-80.

Memo

Memo:

Biography: Chang Changyuan(1961—), male, doctor, associate professor, ccyycc@seu.edu.cn.
Citation: Chang Changyuan, Li Xian, Yao Jiannan, Li Juan.Rail-to-rail op-amp with constant transconductance, SR and gain[J].Journal of Southeast University(English Edition), 2008, 24(2):163-167.

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