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[1] Lei Xuemei, Wang Zhigong, Wang Keping, et al. Frequency synthesizer for DRM/DAB/AM/FM RF front-end [J]. Journal of Southeast University (English Edition), 2013, 29 (3): 242-246. [doi:10.3969/j.issn.1003-7985.2013.03.003]

Frequency synthesizer for DRM/DAB/AM/FM RF front-end()

Journal of Southeast University (English Edition)[ISSN:1003-7985/CN:32-1325/N]

2013 3
Research Field:
Electronic Science and Engineering
Publishing date:


Frequency synthesizer for DRM/DAB/AM/FM RF front-end
Lei Xuemei1 2 Wang Zhigong1 Wang Keping3 Shen Lianfeng1
1School of Information Science and Engineering, Southeast University, Nanjing 210096, China
2College of Electronic Information Engineering, Inner Mongolia University, Hohhot 010021, China
3Department of Electrical Engineering, University of Washington, Seattle, Washington 98195, USA
frequency synthesizer wideband voltage-control oscillator pulse swallow frequency divider low phase noise
This paper describes a wideband low phase noise frequency synthesizer. It operates in the multi-band, including digital radio mondiale(DRM), digital audio broadcasting(DAB), amplitude modulation(AM)and frequency modulation(FM). In order to cover the signals of the overall frequencies, a novel frequency planning and a new structure are proposed. A wide-band low-phase-noise low-power voltage-control oscillator(VCO)and a high speed, wide band, high frequency division ratio pulse swallow frequency divider with a low power consumption are presented. The monolithic DRM/DAB/AM/FM frequency synthesizer chip is also fabricated in a SMIC’s 0.18-μm CMOS process. The die area is 1 425 μm×795 μm including the test buffer and pads. The measured results show that the VCO operating frequency range is from 2.22 to 3.57 GHz, the measured phase noise of the VCO is 120.22 dBc/Hz at 1 MHz offset; the pulse swallow frequency divider operation frequency is from 0.9 to 3.4 GHz. The phase noise in the phase-locked loop(PLL)is -59.52 dBc/Hz at 10 kHz offset and fits for the demand of the DRM/DAB/AM/FM RF front-end. The proposed frequency synthesizer consumes 47 mW(including test buffer)under a 1.8 V supply.


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Biographies: Lei Xuemei(1972—), female, doctor, associate professor; Wang Zhigong(corresponding author), male, doctor, professor, zgwang@seu.edu.cn.
Foundation items: The Research Project of Science and Technology at the University of Inner Mongolia Autonomous Region(No.NJZY11016), the Innovation Fund of the Ministry of Science and Technology for Small and Medium Sized Enterprises of China(No.11C26213211234).
Citation: Lei Xuemei, Wang Zhigong, Wang Keping, et al. Frequency synthesizer for DRM/DAB/AM/FM RF front-end[J].Journal of Southeast University(English Edition), 2013, 29(3):242-246.[doi:10.3969/j.issn.1003-7985.2013.03.003]
Last Update: 2013-09-20